Analog Design Engineer-Chennai

  • 4-5 years experience
  • 4 Lac-6 Lac
  • Chennai

Job Description

- PLL & DLL circuits - High speed SerDes Interfaces (1Gbps-30Gbps) - Review SerDes standards to develop analog sub-block specifications. - Identify and refine circuit architectures to achieve optimal power, area and performance targets. - Propose design and verification strategies that efficiently use simulator features to ensure highest quality design. :.


4 Lac-6 Lac P.A

Functional Area

IT Software - Embedded VLSI


Permanent Job, Full time

Other Benefits


Primary Responsibilties

Create Verilog/verilog-A behavioral models. Perform cell characterization & create cell level timing (.LIB) models. Create test benches, simulate, run, verify, & analyze spice & mixed modes sims.

Required Qualification

UG - Bachelor of Engineering/Technology (BE/B.Tech) - Electronics & Communication

PG - PG Not Required - Any Specialization

Cerification - N/A

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